SHIVANG GAUR

Master's Student, Department of Electrical Engineering, IIT Delhi

I am a Master’s student with strong interests in both Machine Learning and Embedded Systems. I aim to contribute to roles that involve developing intelligent algorithms as well as optimizing performance on real-world hardware. You can connect with me on LinkedIn.

Educational Background

M.Tech (Computer Technology), IIT Delhi – CGPA 7.26 (GATE CS AIR 554)

B.Tech (CSE), DCRUST Murthal – CGPA 7.87/10

Schooling, DAVCPS – Class XII: 86.2%, Class X: CGPA 9.2

Major Project (Thesis)

Title: Multi-Person Identification from Geophone Signals via Spectrogram Analysis and Deep Learning

Supervisor: Prof. Subrat Kar

Designed framework combining spectrogram-based geophone signal processing, metadata integration, and deep learning with cross-entropy & triplet loss (~90% accuracy).
Implemented real-time inference on Raspberry Pi for human presence detection using geophones.
Enabled result streaming to local & cloud servers for remote monitoring.

Publications

Gaur, S., Karunik, A. & Naik, S. (2024). "A Metric-Driven Comparative Study of Text Summarization Models: Insights from State-of-the-Art LLMs." International Conference on AI & Speech Technology. DOI

Projects

Kernel-Level Gang Scheduler for HPC Workloads – Custom Linux scheduling class (SCHED_GANG) for synchronized multi-core execution.
Resource Usage Tracker & Limiter – Kernel syscalls to monitor and cap heap memory & open files; enforced limits via SIGKILL.
Text-to-SQL System – Schema-aware T5-base model with rule-based post-processing (37.5% exact match accuracy).
Transformer based Grammatical Error Correction System – Developed using BART/T5 with LoRA achieving BLEU 90 and 58% exact match.
Conditional Random Field Model for Named Entity Recognition – Implemented CRF with transition constraints; achieved 84% accuracy.
RISC-V assembly code to find the inverse of a matrix – Implemented compute and verification modules: compute module applied Gauss–Jordan elimination method to calculate the matrix inverse, while verification module multiplied the input matrix by its inverse to verify the result.
5-stage Pipelined Processor with Interlocks and Forwarding – Designed a 5-stage pipelined processor with Interlocks and Forwarding, No delayed branches and Predict not-taken.
Tree-Structured Neural Network for MNIST – Hierarchical NN correcting parent misclassifications, ~93% accuracy.
Pairwise Binary Classification for Image Similarity – DL-based model for pairwise image classification (72% accuracy).
Summarizing PDFs using LangChain + Streamlit – Interactive LLM-powered PDF summarization with FAISS search.

Internships

NIELIT, Delhi (Feb 2024 – Jul 2024): Training on AI (ML/DL, CV, NLP); worked on comparative study of text summarization models.
FITT, IIT Delhi (Dec 2024 – Jan 2025): Led team for gait data collection using geophones and cameras for 100+ subjects.

Technical Skills

Languages: C, C++, Python, RISC-V

Libraries: PyTorch, Hugging Face, Transformers, scikit-learn, LoRA/PEFT, ONNX

Tools: Linux, Kaggle, Colab, Jupyter, SQL Server, Raspberry Pi, Logisim, Figma, Unreal Engine

Profiles: Personal Webpage | GitHub